What’s new in lpar2rrd 6.02:
- Support of VMware, oVirt/RHV, XenServer, MS Servers and Hyper-V, Solaris CDOM/LDOM.
lpar2rrd is a free, open source and web-based application that allows you to generate historical, future trends, real-time CPU usage graphs of LPARs (logical partitions) and shared CPU utilization of IBM Power servers. It has been engineered to support only HMC-based micro-partitioned systems that have a shared CPU pool.
The software can also be used to collect complete logical and physical (HW) configuration of all LPARs, managed systems, and all changes in their configuration and state. It supports all sorts of logical partitions, including VIOS, AS400, Linux and AIX, and its agentless, which means that it gets all the information from IVM, SDMC or HMC.
Features at a glance
Key features include support for a wide variety of LPARs and operating systems, support for creating charts based on collected data, support for automatic creation of a menu-based web interface for viewing charts, logs and configuration, support for accessing HMC servers via SSH keys, support for displaying the total memory usage for each managed system.
In addition, the application displays the last 100 changes that took place in the configuration, as well as the last 100 change in the state of all managed systems and their logical partitions. It is easy to use, easy to install and easy to configure, and doesn’t require additional management for adding, removing, renaming or creating LPARs.
By default, the software creates graphs with one year of historical utilization data, but it can be easily configured to generate graphs with more than one year of historical CPU usage. It automatically loads all the historical data that is collected on the HMC and saves it in RRDTool databases.
Under the hood and availability
The program is written in the UNIX Shell and Perl programming languages, distributed as a single, universal sources archive, designed from the ground up to be installed on any distribution of Linux, supporting both 32-bit and 64-bit instruction set architectures.
